1. Field of the Invention
The present invention relates to a read signal processor, an image reading apparatus, and an image forming apparatus.
2. Description of the Related Art
FIG. 23 is a schematic block diagram of a typical signal processor in a typical image reading apparatus. In the example shown in FIG. 23, an analog signal processing IC 10 having three inputs, RIN for red (R), GIN for green (G), and BIN for blue (B), is used corresponding to a color linear image sensor 1 having three outputs: RO for red, GO for green, and BO for blue. The analog signal processing IC 10 includes, with respect to each of the inputs, a clamp circuit (CLMP) 11 for setting an input terminal potential after alternate-current coupling, a sample-hold (SH) circuit 12 for extracting signal components of only the output signal of the color linear image sensor 1, and a variable gain amplifier (VGA) 13 for amplifying sample-hold signals based on a designated amplification rate. Subsequently, an analog multiplex circuit (AMPX) 14 switches variable gain amplifier outputs for each color and converts them to point sequential signals in the order of RGB, and an analog-digital converter (ADC) 15 converts the analog signals to digital signals and outputs the digital signals as point sequential image data (DO[9:0]).
The analog signal processing IC 10 includes a timing generator & interface (TG&IF) 16 that receives from outside a CLMPIN signal, an SH signal, and an MCLK signal. The CLMPIN signal is a gate signal for controlling the clamp circuits 11. The SH signal is a sample clock for sampling a signal area of image signals in the SH circuits 12. The MCLK signal is a reference clock for controlling the AMPX 14 and the ADC 15. An RMB signal is an identification signal for indicating timing of RED data. The variable gain amplifier 13 includes a register for holding a gain set value received through a data/address bus. FIG. 24 is timing chart for explaining output timings of the signals RIN, GIN, BIN, SH, MCLK, M1, M2, DO[9:0], and RMB.
For example, Japanese Patent Applications Laid-open Nos. 2002-199213 (patent document 1) and 2002-281325 (patent document 2) disclose related technology. The technology disclosed in the patent document 1 provides an image reading apparatus capable of alleviating an output difference between an odd pixel and an even pixel. Specifically, the image reading apparatus disclosed in the patent document 1 includes an optical unit (a halogen lamp and a lens unit) for reading an image on a document, a solid image sensor (CCD) for performing photoelectric conversion to optical data and outputting image data that corresponds to the document image when the optical data read by the optical unit is input, an analog signal processor (a sample-hold circuit, a black-level correction circuit, an amplification circuit) that processes image signals output from the solid image sensor in an analog way, and two of A/D converters that are arranged for each channel of RGB and A/D convert image signals processed by the analog signal processor. The two of A/D converters include two types of input clocks that are different in phase.
On the other hand, the technology disclosed in the patent document 2 provides a color image reading apparatus that can exchange R/B image data with a simple configuration and performs signal processing with respect to image data read from a RGB 3 line linear sensor. Specifically, the image reading apparatus disclosed in the patent document 2 includes the internal function of exchanging R/B image data with an ASIC for performing signal processing to a CCD, motor, and lamp driving signal and image data and R/G image data is exchanged through the function.
The conventional signal processing IC is effective for a color linear image sensor with a relatively low pixel rate (up to about 10 megahertz per color), that is, when the output from a color linear image sensor is through one channel per one color. However, if the pixel rate is higher, or if image data is to be transmitted for a longer distance (a few tens of centimeters or more), it is necessary not only to provide another driver but also to perform processing of resolving point sequential image data for each color. Thus, the conventional signal processing IC is disadvantageous in terms of mounting area and component costs.